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PARK, HONG JUNE(박홍준) scopus
Department
Dept of Electrical Engineering(전자전기공학과)
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    Publication & Time Cited Count (For the Last 5 years)

    Results 1-9 of 9 (Search time: 0.001 seconds).
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    Date Issued : 2016
    Article
    A Digitally Controlled Op-Amp with Level-Crossing-Based Approximation and its Application to a 10-bit Pipeline ADCSCIESCOPUS

    Journal of Circuits, Systems and Computers (JSTS), vol. 25, no. 12, 2016-12

    Article
    A SNR-Enhanced Mutual-Capacitive Touch-Sensor ROIC Using an Averaging With Three Specific TX Frequencies, a Noise Memory, and a Compact Delay Compensation CircuitSCIESCOPUS

    IEEE Sensors Journal, vol. 16, no. 8, page. 6931 - 6938, 2016-09-15

    Article
    A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM InterfaceSCIESCOPUS

    IEEE Journal of Solid-State Circuits, vol. 51, no. 8, page. 1890 - 1901, 2016-08

    Article
    A Coefficient-Error-Robust Feed Forward Equalizing Transmitter for Eye-variation and Power ImprovementSCIESCOPUS

    IEEE Journal of Solid-State Circuits, vol. 51, no. 8, page. 1902 - 1914, 2016-08

    Article
    All-Synthesizable 5-Phase Phase-Locked Loop for USB2.0SCIESCOPUSKCI

    Journal of Semiconductor Technology and Science, vol. 16, no. 3, page. 352 - 358, 2016-06

    Article
    A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%–80% Input Duty Cycle for SDRAMsSCIESCOPUS

    IEEE TRANSACTIONS ON CIRCUITS AND SYSTEMS—II: EXPRESS BRIEFS, vol. 63, no. 2, page. 141 - 145, 2016-02

    Article
    A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive EqualizationSCIESCOPUS

    IEEE Transactions on Circuits and SYSTEMS—I: Regular Papers, vol. 63, no. 2, page. 276 - 2871549-83, 2016-02

    Article
    A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDCSCIESCOPUS

    IEEE Journal of Solid-State Circuits, vol. 51, no. 2, page. 391 - 400, 2016-02

    Article
    A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/sSCIESCOPUS

    EEE Transactions on Circuits and Systems I: Regular Papers, vol. 63, no. 1, page. 122 - 133, 2016-01

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