A Low-Voltage High-Speed CMOS Inverter-Based Digital Differential Transmitter with Impedance Matching Control and Mismatch Calibration
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- Title
- A Low-Voltage High-Speed CMOS Inverter-Based Digital Differential Transmitter with Impedance Matching Control and Mismatch Calibration
- Authors
- Jun-Hyun Bae; Sang-Hune Park; Sim, JY; Park, HJ
- Date Issued
- 2009-03
- Publisher
- 대한전자공학회
- Abstract
- A digital differential transmitter based on CMOS inverter worked up to 2.8 Gbps at the supply voltage of 1 V with a 0.18 mu m CMOS process. By calibrating the output impedance of the transmitter, the impedance matching between the transmitter output and the transmission line is achieved. The PVT variations of pre-driver are compensated by the calibration of the rising-edge delay and falling-edge delay of the pre-driver outputs. The chip fabricated with a 0.18 gm CMOS process, which uses the standard supply voltage of 1.8 V, gives the highest data rate of 4 Gbps at the supply voltage of 1.2 V. The proposed calibration schemes improve the eye opening with the voltage margin by 200% and the timing margin by 30%, at 2.8 Gbps and 1 V.
- Keywords
- Transmitter; digital; differential; termination; inverter-based; low voltage
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/25791
- DOI
- 10.5573/JSTS.2009.9.1.014
- ISSN
- 1598-1657
- Article Type
- Article
- Citation
- JOURNAL OF SEMICONDUCTOR TECHNOLOGY AND SCIENCE, vol. 9, no. 1, page. 14 - 21, 2009-03
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