Performance of single-electron transistor logic composed of multi-gate single-electron transistors
SCIE
SCOPUS
- Title
- Performance of single-electron transistor logic composed of multi-gate single-electron transistors
- Authors
- Jeong, MY; Jeong, YH; Hwang, SW; Kim, DM
- Date Issued
- 1997-11
- Publisher
- JAPAN J APPLIED PHYSICS
- Abstract
- We have performed Monte Carlo studies of complementary capacitively coupled single-electron transistor (complementary C-SET) logic gates for single-electron digital logic circuits. The simulations carried out with various types of complementary C-SET logic gates showed that serial connections of single-electron transistors necessary for multi-input operations resulted in the degradation of the switching speed. It is pointed out that the multi-gate single-electron transistor configuration can provide a possible means to circumvent this problem. However, the associated nonsymmetric input-output characteristics could cause the operation failure of the circuit. It is shown that the multi-gate single-electron transistor circuits are the optimal choice from the standpoint of high speed operation and design simplicity, when confined to the input voltages not exceeding four terminals.
- Keywords
- single-electron tunneling; Coulomb blockade; single-electron transistor; single-electron transistor logic; multi-gate single-electron transistor; COULOMB-BLOCKADE; CIRCUITS
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/20921
- DOI
- 10.1143/JJAP.36.6706
- ISSN
- 0021-4922
- Article Type
- Article
- Citation
- JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, vol. 36, no. 11, page. 6706 - 6710, 1997-11
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