Parameter Optimization Of Multi-tunnel Junction Single-electron Pass-transistor Logic Circuits.
- Title
- Parameter Optimization Of Multi-tunnel Junction Single-electron Pass-transistor Logic Circuits.
- Authors
- 정윤하
- Date Issued
- 2002-10-01
- Publisher
- Korean Physical Society
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/74293
- Article Type
- Conference
- Citation
- 한국물리학회, page. 559, 2002-10-01
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- There are no files associated with this item.
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