DC Field | Value | Language |
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dc.contributor.author | Prakash, A | - |
dc.contributor.author | Park, Jaesung | - |
dc.contributor.author | Song, Jeonghwan | - |
dc.contributor.author | Woo, Jiyong | - |
dc.contributor.author | Cha, Eui-Jun | - |
dc.contributor.author | Hwang, H | - |
dc.date.accessioned | 2018-06-07T01:02:37Z | - |
dc.date.available | 2018-06-07T01:02:37Z | - |
dc.date.created | 2015-08-11 | - |
dc.date.issued | 2015-01 | - |
dc.identifier.issn | 0741-3106 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/50131 | - |
dc.description.abstract | Multilevel cell (MLC) storage technology is attractive in achieving ultrahigh density memory with low cost. In this letter, we have demonstrated 3-bit per cell storage characteristics in a TaOx-based RRAM. By analyzing the key requirements for MLC operation mainly the switching uniformity and stability of resistance levels, an engineered stack based on thermodynamics in top electrode/(vacancy reservoir/defect control layer)/switching layer/bottom electrode structure was designed. In the optimized stack with similar to 10-nm Ta layer incorporated at W/TaOx interface, seven low resistance state levels with same high resistance state were obtained by controlling the switching current down from 30 mu A enabling low power 3-bit storage in contrast to the control device which shows 2-bit MLC with resistance saturation. The improved switching and MLC behavior is attributed to the minimized stochastic nature of set/reset operations due to filament confinement by favorable electric field generation and formation of thin but highly conductive filament which is confirmed electrically. | - |
dc.language | English | - |
dc.publisher | IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC | - |
dc.relation.isPartOf | IEEE ELECTRON DEVICE LETTERS | - |
dc.title | Demonstration of Low Power 3-bit Multilevel Cell Characteristics in a TaOx-Based RRAM by Stack Engineering | - |
dc.type | Article | - |
dc.identifier.doi | 10.1109/LED.2014.2375200 | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | IEEE ELECTRON DEVICE LETTERS, v.36, no.1, pp.32 - 34 | - |
dc.identifier.wosid | 000347045200012 | - |
dc.date.tcdate | 2019-02-01 | - |
dc.citation.endPage | 34 | - |
dc.citation.number | 1 | - |
dc.citation.startPage | 32 | - |
dc.citation.title | IEEE ELECTRON DEVICE LETTERS | - |
dc.citation.volume | 36 | - |
dc.contributor.affiliatedAuthor | Prakash, A | - |
dc.contributor.affiliatedAuthor | Hwang, H | - |
dc.identifier.scopusid | 2-s2.0-84920146417 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 29 | - |
dc.type.docType | Article | - |
dc.subject.keywordAuthor | Multi-level cell | - |
dc.subject.keywordAuthor | RRAM | - |
dc.subject.keywordAuthor | TaOx | - |
dc.subject.keywordAuthor | vacancy reservoir | - |
dc.subject.keywordAuthor | defect engineering | - |
dc.subject.keywordAuthor | dense filament | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
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