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Conference
Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits

ITC-CSCC, 2011-06-22

Conference
USB 2.0 Protocol Layer의 FPGA 구현과 검증

2011 대한전자공학회 하계종합학술대회, 2011-06-24

Conference
Verilog Design of Asynchronous Clock Domain Crossing Techniques in High Speed Digital Transceiver Circuits

International Technical Conference on Circuits/Systems, Computers and Communications, 2011-06-22

Conference
USB 2.0 Protocol Layer의 FPGA 구현과 검증

대한전자공학회 하계종합학술대회, page. 376 - 379, 2011-06-24

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