Scalable Neuron Circuit Using Conductive-Bridge RAM for Pattern Reconstructions
SCIE
SCOPUS
- Title
- Scalable Neuron Circuit Using Conductive-Bridge RAM for Pattern Reconstructions
- Authors
- Jang, JW; Attarimashalkoubeh, B; Prakash, A; Hwang, H; Jeong, Yoon-Ha
- Date Issued
- 2016-06
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGINEERS INC
- Abstract
- A novel neuron circuit using a Cu/Ti/Al2O3-based conductive-bridge random access memory (CBRAM) device for hardware neural networks that utilize nonvolatile memories as synaptic weights is introduced. The neuronal operations are designed and proved using SPICE simulations with a Verilog-A device model based on the measured characteristics of the CBRAM device. The applicability of the neuron is demonstrated by constructing a neural network system and applying it to pattern reconstructions that can recall the original patterns from noisy patterns. With these CBRAM-based neurons, a reduction in the area and power of neuromorphic chips is expected in comparison with CMOS-only neuron implementations.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/37697
- DOI
- 10.1109/TED.2016.2549359
- ISSN
- 0018-9383
- Article Type
- Article
- Citation
- IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 63, no. 6, page. 2610 - 2613, 2016-06
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- There are no files associated with this item.
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