An Analytical Dynamic Scaling of Supply Voltage and Body Bias Based on Parallelism-Aware Workload and Runtime Distribution
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- Title
- An Analytical Dynamic Scaling of Supply Voltage and Body Bias Based on Parallelism-Aware Workload and Runtime Distribution
- Authors
- Kim, J; Oh, S; Yoo, S; Kyung, CM
- Date Issued
- 2009-04
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGI
- Abstract
- Dynamic voltage and frequency scaling (DVFS) for a parallel software program is crucial for lowering the ever-increasing power consumption of multiprocessor systems-on-chips (SoCs). In this paper, we propose an analytical DVFS method that judiciously exploits slack by considering the varying parallelism over each path in a task graph. The proposed method overcomes the conventional pessimistic assumption on the remaining workload, i.e., worst-case execution cycle. It yields minimum average energy consumption by utilizing the runtime distribution of a software program while satisfying the deadline constraints. The proposed method tackles leakage power consumption as well as dynamic power consumption by combined V-dd/V-bb scaling. Compared to conventional method [15], experimental results show that the proposed method provides up to 49.20% energy reduction for a set of synthetic task graphs and yields 23.93% and 27.15% energy reductions for two multimedia applications, namely, the H.264 encoder and decoder, respectively.
- Keywords
- Dynamic voltage and frequency scaling (DVFS); energy optimization; multiprocessor; parallelism; runtime distribution; SYSTEMS
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/28606
- DOI
- 10.1109/TCAD.2009.2013993
- ISSN
- 0278-0070
- Article Type
- Article
- Citation
- IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, vol. 28, no. 4, page. 568 - 581, 2009-04
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