A Transistor-Based Analog Predistorter With Unequal Delays for Memory Compensation

Abstract

A transistor-based analog predistorter (APD) with memory effect compensation is represented. The nonlinearity of a gain amplifier generated by a low supply voltage is used as an error generator. The predistorted signal by the unequal-delayed nonlinear paths improves the linearity by compensating for memory effects of the power amplifier (PA). For verification, the proposed APD with three-branch nonlinear paths is implemented with a 30-W class-AB PA and tested using two-tone and various wideband code division multiple access (WCDMA) signals at 2.14 GHz. From the measured results, the proposed APD significantly improves the linearity of the PA with memory effects.