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A new paradigm for real-time parallel storage and recognition of patterns based on a hierarchical organization of associative memories utilizing Walsh function encoding SCIE SCOPUS

Title
A new paradigm for real-time parallel storage and recognition of patterns based on a hierarchical organization of associative memories utilizing Walsh function encoding
Authors
Han, SJOh, SY
Date Issued
2009-12
Publisher
SPRINGER
Abstract
A new hierarchical Walsh memory which can store and quickly recognize any number of patterns is proposed. A Walsh function based associative memory was found to be capable of storing and recognizing patterns in parallel via purely a software algorithmic technique (namely, without resorting to parallel hardware) while the memory itself only takes a single pattern space of computer memory, due to the Walsh encoding of each pattern. This type of distributed associative memory lends itself to high speed pattern recognition and has been reported earlier in a single memory version. In this paper, the single memory concept has first been extended to a parallel memory module and then to a tree-shaped hierarchy of these parallel modules that are capable of storing and recognizing any number of patterns for practical large scale data applications exemplified by image and speech recognition. The memory hierarchy was built by successively applying k-means clustering to the training data set. In the proposed architecture, the clustered data subsets are stored respectively into a parallel memory module where the module allocation is optimized using the genetic algorithm to realize a minimal implementation of the memory structure. The system can recognize all the training patterns with 100% accuracy and further, can also generalize on similar data. In order to demonstrate its efficacy with large scale real world data, we stored and recognized over 500 faces while at same time, achieving much reduced recognition time and storage space than template matching.
Keywords
Parallel storage and recognition; Walsh function; Parallel memory; Hierarchical associative memory; Optimal memory allocation; FACE RECOGNITION; INFORMATION; RECALL
URI
https://oasis.postech.ac.kr/handle/2014.oak/27619
DOI
10.1007/S10489-008-0
ISSN
0924-669X
Article Type
Article
Citation
APPLIED INTELLIGENCE, vol. 31, no. 3, page. 305 - 317, 2009-12
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오세영OH, SE YOUNG
Dept of Electrical Enginrg
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