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A Case Study on Modeling and Optimizing Photolithography Stage of Semiconductor Fabrication Process SCIE SCOPUS

Title
A Case Study on Modeling and Optimizing Photolithography Stage of Semiconductor Fabrication Process
Authors
Kim, HJKim, KJKwak, DS
Date Issued
2010-11
Publisher
JOHN WILEY & SONS LTD
Abstract
Photolithography in the semiconductor fabrication process is the core stage that determines the quality of semiconductor chips. The fabrication process is a batch process that causes variation in the quality of chips; thus, uniformity has always been an important goal of the process. This research is a case study on optimizing the photolithography stage to improve uniformity and the target achievement of critical dimension, a quality measure of semiconductor chips. The case study finds the optimal setting of input variables in photolithography by applying multivariate normal linear modeling with operational data obtained by sampling during manufacturing. The predicted performance of the optimal setting is found to be close to the limit of improvement estimated based on the model. For practitioners, several issues that can be considered for better optimization are also provided. Copyright (c) 2010 John Wiley & Sons, Ltd.
Keywords
semiconductor fabrication process; within-wafer variation; uniformity; target achievement; process optimization; BAYESIAN VARIABLE SELECTION
URI
https://oasis.postech.ac.kr/handle/2014.oak/25304
DOI
10.1002/QRE.1149
ISSN
0748-8017
Article Type
Article
Citation
QUALITY AND RELIABILITY ENGINEERING INTERNATIONAL, vol. 26, no. 7, page. 765 - 774, 2010-11
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김광재KIM, KWANG JAE
Dept of Industrial & Management Enginrg
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