Improving the performance of turbo codes with a simple protection scheme for error-prone bit positions

Abstract

It is well known that turbo codes provide highly unequal error protection within a transmitted frame. Previous attempts to exploit this fact focused mainly on adding additional redundancy to provide extra protection for the error-prone bit positions. Here, instead, we use the error-detection capability of the cyclic redundancy check (CRC), which is almost always employed in practical systems. Once a frame is declared uncorrectable by the CRC, a process termed the error-prone bit processing procedure is activated in an attempt to correct the probable error patterns which are a priori identified as being error-prone.