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CMOS sense amplifier-based flip-flop with two N-(CMOS)-M-2 output latches SCIE SCOPUS
- Title
- CMOS sense amplifier-based flip-flop with two N-(CMOS)-M-2 output latches
- Date Issued
- 2000-03-16
- Publisher
- IEE-INST ELEC ENG
- Abstract
- By replacing the NAND SR latch at the output stage of a conventional sense amplifier-based flip-flop (SAFF) hy two N-(CMOS)-M-2 latches, the operating speed of the flip-flop is enhanced by 63% and the power-delay-product is reduced by 28%.
- ISSN
- 0013-5194
- Article Type
- Article
- Citation
- ELECTRONICS LETTERS, vol. 36, no. 6, page. 498 - 500, 2000-03-16
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Related Researcher
- 박홍준PARK, HONG JUNE
- Dept of Electrical Enginrg