New collector undercut technique using a SiN sidewall for low base contact resistance in InP/InGaAs SHBTs
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SCOPUS
- Title
- New collector undercut technique using a SiN sidewall for low base contact resistance in InP/InGaAs SHBTs
- Authors
- Lee, K; Yu, DY; Chung, M; Kang, JC; Kim, B
- Date Issued
- 2002-06
- Publisher
- IEEE-INST ELECTRICAL ELECTRONICS ENGI
- Abstract
- A new collector undercut process using SiN protection sidewall has been developed for high speed InP/InGaAs single heterojunction bipolar transistors (HBTs). The HBTs fabricated using the technique have a larger base contact area, resulting in a smaller DC current gain and smaller base contact resistance than HBTs fabricated using a conventional undercut process while maintaining low C-bc. Due to the reduced base contact resistance, the maximum oscillation frequency (f(max)) has been enhanced from 162 GHz to 208 GHz. This result clearly shows the effectiveness of this technique for high-speed HBT process, especially for the HBTs with a thick collector layer, and narrow base metal width.
- Keywords
- base-collector capacitance; base resistance; collector undercut; heterojunction bipolar transistors (HBTs); CAPACITANCE; HBTS
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/19073
- DOI
- 10.1109/TED.2002.1003753
- ISSN
- 0018-9383
- Article Type
- Article
- Citation
- IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 49, no. 6, page. 1079 - 1082, 2002-06
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