Ferroelectric Gated Electrical Transport in CdS Nanotetrapods
SCIE
SCOPUS
- Title
- Ferroelectric Gated Electrical Transport in CdS Nanotetrapods
- Authors
- Fu, WY; Qin, SY; Liu, L; Kim, TH; Hellstrom, S; Wang, WL; Liang, WJ; Bai, XD; Li, AP; Wang, EG
- Date Issued
- 2011-05
- Publisher
- American Chemical Society
- Abstract
- Complex nanostructures such as branched semiconductor nanotetrapods are promising building blocks for next-generation nanoelectronics. Here we report on the electrical transport properties of individual CdS tetrapods in a field effect transistor (FET) configuration with a ferroelectric Ba0.7Sr0.3TiO3 film as high-k, switchable gate dielectric. A cryogenic four-probe scanning tunneling microscopy (STM) is used to probe the electrical transport through individual nanotetrapods at different temperatures. A p-type field effect is observed at room temperature, owing to the enhanced gate capacitance coupling. And the reversible remnant polarization of the ferroelectric gate dielectric leads to a well-defined nonvolatile memory effect. The field effect is shown to originate from the channel tuning in the arm/core/arm junctions of nanotetrapods. At low temperature (8.5 K), the nanotetrapod devices exhibit a ferroelectric-modulated single-electron transistor (SET) behavior. The results illustrate how the characteristics of a ferroelectric such as switchable polarization and high dielectric constant can be exploited to control the functionality of individual three-dimensional nanoarchitectures.
- Keywords
- Nanotetrapod; ferroelectric; field effect; nonvolatile memory; band alignment; scanning probe microscopy; FIELD-EFFECT TRANSISTORS; CARBON-NANOTUBE; ROOM-TEMPERATURE; MEMORY; NANOCRYSTALS; DIELECTRICS; TETRAPODS; GROWTH
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/15109
- DOI
- 10.1021/NL104398V
- ISSN
- 1530-6984
- Article Type
- Article
- Citation
- Nano Letters, vol. 11, no. 5, page. 1913 - 1918, 2011-05
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