Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current

Abstract

Analysis of an open-loop time amplifier shows good agreement between measurements and calculations on the time gain, distortion of time gain, and rms noise and offset of output time difference. The time amplifier is based on the slew rate control method. It achieves a large time gain up to 120 and a wide range of input time difference up to 2 ns. The circuit consists of two precharged capacitors and current sources, where one capacitor is discharged at a fast slew rate during the time interval of the input time difference and then both capacitors are discharged at the same slow slew rate. The time gain is simply determined by the ratio of two bias current values. The proposed time amplifier is followed by an 8-bit TDC to obtain the digital output code. The time gain distortion caused by channel length modulation is less than 1.6% for the input time difference larger than 100 ps. The time offset and the rms noise of output time difference are inversely proportional to the smaller bias current. The rms noise is dominated by the noise of the comparator reference voltage. The time amplifier and TDC consume 0.36 mW and 1 mW, respectively, at 1.2 V supply in a 0.13 mu m CMOS process.