High Speed, Low Power Programming in 0.17mum Channel Length NOR-type Floating Gate Flash Memory Cell Free of Drain Turn-On Effects

Abstract

We present a fast low power programming in floating gate electrically erasable and programmable read only memory (EEPROM) cells with the aspect ratio of 0.09 / 0.17 mum. The threshold voltage shift (Delta V-TH) of 5V, for example, was done in less than I mus, using the peak drain current (I-D) of approximate to100muA. More importantly, by using the substrate bias (V-B), programming was done in 2-3 mus at I-D of 30 muA and V-D of 3V. This observed speed is faster than reported values by about 2.5 and power used was about 50% lower than the previous one. The optimal programming bias conditions are presented, together with the reasons for fast programming.