Backward propagated capacitance model for register transfer level power estimation
SCIE
SCOPUS
- Title
- Backward propagated capacitance model for register transfer level power estimation
- Authors
- Choi, JY; Kim, YH; Cho, KR
- Date Issued
- 2001-02
- Publisher
- GORDON BREACH PUBLISHING, TAYLOR & FR
- Abstract
- We present a new approach to the power modeling of functional modules, referred to as the backward propagated capacitance model, for estimating the power consumption of VLSI systems that are described at the register transfer level (RTL). To construct the proposed model, we investigate the effect of the module's internal capacitance on power consumption at the gate level. Then, we store the effect in a library in terms of the equivalent input capacitance of the module. The equivalent input capacitance is used to compute the module's power without the lower level elaboration during the power analysis of the RTL system. In the experiment using benchmark functional modules, the proposed model showed the absolute modeling error of 1.39% on average. For the benchmark RTL systems, the proposed model exhibited the absolute error of 3.04% in power estimation on average. If signal characteristics deviate from the modeling condition, the modeling error may increase. Experimental results show that the modeling accuracy can be improved greatly by using a simple compensation method.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/12979
- DOI
- 10.1155/2001/78456
- ISSN
- 1065-514X
- Article Type
- Article
- Citation
- VLSI DESIGN, vol. 12, no. 2, page. 221 - 231, 2001-02
- Files in This Item:
-
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.