Graph Convolutional Networks Hardware Accelerator with Memory Splitting and Reordering

Abstract

Deep learning has been developed for about 10 years drastically from starting MLP. These days, CNN is a general choice for image classification, and Transformer or BERT is a general choice for language work. Something in common among these networks is inputs of them exist on Euclidean space. That means we can express them as 1D data or 2D data. Many researchers are still studying in image or language domain, but some people have started to study about non-Euclidean data, which is graph, because there are more data consist of graph like social networks and protein structures than Euclidean data which can be expressed in grid. They started to adopt a concept of convolution in not only image classification domain, but also graph domain. It was hard to adopt convolution to graph directly, but it became possible by using spectral graph convolution instead of spatial graph convolution. After that, Graph Convolutional Networks (GCN) which has realistic computation amounts was introduced in 2016, and it became the basic target model in accelerating GNN. In this paper, we analyzed a method about accelerating this basic GCN, and presented hardware accelerator for large scale graph dataset finally. Also, we suggested a preprocessing method named Memory Splitting and Reordering (MSR). So, the architecture will be called MSR-GCN in remainder. MSR-GCN use outer product method during sparse × dense matrix matrix multiplication. Most of people will mistrust about using outer product because of huge on-chip memory demands, but we will explain about it later. Also, there is an advantage that we can use preprocessing in outer product based system, whereas inner product is not. There are two prior works which we would compare: HyGCN and AWB-GCN. HyGCN is similar position with Eyeriss in CNN, and it consists of two separate engines, called Aggregation Engine and Combination Engine. Each engine implements sparse × dense matrix matrix multiplication and dense × dense matrix matrix multiplication. On the other hand, AWB-GCN is focusing on a workload balancing. It uses real-time adjustment of workload distribution and it is a SOTA GCN accelerator when we exclude Processing in Memory, real time graph reorganization and graph reordering. MSR-GCN shows similar number of cycles compared to AWB-GCN, and we checked there are chances to reduce on-chip memory size, power, area and energy consumption.