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A Cryo-CMOS Controller IC With Fully Integrated Frequency Generators for Superconducting Qubits

Title
A Cryo-CMOS Controller IC With Fully Integrated Frequency Generators for Superconducting Qubits
Authors
Kang, KiseoMinn, DonggyuBae, SeunghunLee, JaehoBae, SeongunJung, GichangKang, SeokhyeongLee, MoonjooSong, Ho-JinSim, Jae-Yoon
Date Issued
2022-02-20
Publisher
Institute of Electrical and Electronics Engineers Inc.
Abstract
Extensive research on quantum mechanics in past decades has successfully paved the way towards the disruptive technology of quantum computing. A further step to the realization of a fault-tolerant scalable quantum computer is presenting challenges in the field of engineering. It necessitates a microsystem operating at 4K in a dilution refrigerator, which would be inevitable to control thousands or millions of qubits sitting at 10mK. There have been IC implementations of pulse modulators generating qubit-controlling microwave signals [1- 4]. The pulse modulation based on direct synthesis demonstrated feasibility of driving multiple qubits with frequency-division multiplexing (FDM) through one RF cable [1 - 3]. The first implementation of a full controller [1], which includes both read and write chains for spin qubits, demonstrated the highest level of integration. However, the previous work used external local oscillator (LO) sources for frequency synthesis. External feeding of LO requires precise matching; otherwise, a failure would cause leakage to the qubit driving output through PCB traces, resulting in AC-Stark shift of qubit state by unwanted tones at near-resonance. It becomes more problematic in FDM-based multi-qubit driving. Since the fidelity of qubit operations strongly relies on the quality of driving frequency, a low-noise LO generation by a phase-locked loop (PLL) is one of the most important factors [5]. The internal generation of LO gives additional benefits in superconducting qubit interface. It necessitates multiple LOs since the superconducting qubit uses microwave pulse driving for both read and write. To detect the state of a qubit through dispersive readout, the phase reflected from the readout resonator should be measured. Therefore, the driving pulses for the read and the write should be synchronized to a single reference timing. Using built-in PLLs sharing a single reference clock naturally solves this problem.
URI
https://oasis.postech.ac.kr/handle/2014.oak/116968
Article Type
Conference
Citation
2022 IEEE International Solid-State Circuits Conference, ISSCC 2022, page. 362 - 364, 2022-02-20
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