An Approximate Radix-4 Booth Multiplication Circuit Design
- Title
- An Approximate Radix-4 Booth Multiplication Circuit Design
- Authors
- 김기범
- Date Issued
- 2020
- Publisher
- 포항공과대학교
- Abstract
- Many modern applications, such as object recognition using deep neural
networks, require extremely large numbers of multiplications, but can sacrifice
accuracy in order to achieve lower power usage and faster operation. This thesis
proposes a new approximate multiplier design based on radix-4 Booth encod-
ing. The key novel aspect of the proposed design is that approximate circuits
are designed to create intermediate terms, which are then used as the common
inputs to almost all of the logic within one entire row of a partial product array,
resulting in a multi-level logic circuit implementation with extremely low delay
and power usage characteristics. The proposed 8-bit (16-bit) design improves the
power delay product by 17.1% to 30.3% (88.9% to 96.4%) over the previous best
designs. By using accurate, approximated, and truncated regions, a wide range
of approximate multiplier designs with different error characteristics are possible.
Using normalized mean error distance and relative error distance metrics, simulations
using synthesized circuits are used to show that the proposed designs have
significantly improved power/accuracy tradeoffs over the previous best designs.
- URI
- http://postech.dcollection.net/common/orgView/200000292613
https://oasis.postech.ac.kr/handle/2014.oak/111073
- Article Type
- Thesis
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