High-speed parallel very large scale integration architecture for global stereo matching
SCIE
SCOPUS
- Title
- High-speed parallel very large scale integration architecture for global stereo matching
- Authors
- Park, S; Jeong, H
- Date Issued
- 2008-01
- Publisher
- I S & T - SOC IMAGING SCIENCE TECHNOL
- Abstract
- Although stereo matching algorithms based on belief propagation (BP) tend to show excellent matching performance, their huge computational complexity has been the major barrier to real-time applications. In this light, we propose a parallel very large scale integration (VLSI) architecture for BP computation, which has only simple integer operations and shows low matching error rate for the Middlebury database. (C) 2008 SPIE and IS&T.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/10850
- DOI
- 10.1117/1.2892680
- ISSN
- 1017-9909
- Article Type
- Article
- Citation
- JOURNAL OF ELECTRONIC IMAGING, vol. 17, no. 1, page. 10501 - 10501, 2008-01
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- There are no files associated with this item.
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