A High-Speed PWM-Modulated Transceiver Network for Closed-Loop Channel Topology
SCIE
- Title
- A High-Speed PWM-Modulated Transceiver Network for Closed-Loop Channel Topology
- Authors
- LEE, KYONGSU; SIM, JAE YOON
- Date Issued
- 2021-07
- Publisher
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
- Abstract
- This paper proposes a pulse-width modulated (PWM) signaling [1] to send clock and data over a pair of channels for in-vehicle network where a closed chain of point-to-point (P2P) interconnection between electronic control units (ECU) has been established. To improve detection speed and margin of proposed receiver, we also proposed a novel clock and data recovery (CDR) scheme with 0.5 unit-interval (UI) tuning range and a PWM generator utilizing 10 equally-spaced phases. The feasibility of proposed system has been proved by successfully detecting 1.25 Gb/s data delivered via 3 ECUs and inter-channels in 180 nm CMOS technology. Compared to previous study, the proposed system achieved better efficiency in terms of power, cost, and reliability.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/106718
- DOI
- 10.1587/transele.2020CDS0001
- ISSN
- 1745-1353
- Article Type
- Article
- Citation
- Ieice Transactions on Electronics, vol. E104C, no. 7, page. 350 - 354, 2021-07
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