Power modeling of synthesizable soft macros
SCIE
SCOPUS
- Title
- Power modeling of synthesizable soft macros
- Authors
- Do, KT; Kim, YH; Kim, YH; Choi, JY
- Date Issued
- 2004-12
- Publisher
- IEICE-INST ELECTRONICS INFORMATION CO
- Abstract
- We present a new approach to the power modeling of synthesizable soft macros, which uses the characteristics of individual input signals for high accuracy. We also present the parameterized power model, developed using the proposed approach, which can relieve us from the power characterization for all possible macro sizes. Extensive experiments illustrate that the proposed approaches exhibit the overall modeling errors below 4.24% and 4.71% for benchmark macros before and after parameterization, when compared with the results of gate-level analysis.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/10320
- ISSN
- 0916-8508
- Article Type
- Article
- Citation
- IEICE TRANSACTIONS ON FUNDAMENTALS OF ELECTRONICS COMMUNICATIONS AND COMPUTER SCIENCES, vol. E87-A, no. 12, page. 3091 - 3099, 2004-12
- Files in This Item:
- There are no files associated with this item.
Items in DSpace are protected by copyright, with all rights reserved, unless otherwise indicated.