Junction depth dependence of the gate induced drain leakage in shallow junction source/drain-extension nano-CMOS
SCIE
SCOPUS
- Title
- Junction depth dependence of the gate induced drain leakage in shallow junction source/drain-extension nano-CMOS
- Authors
- Song, SH; Kim, JC; Jung, SW; Jeong, YH
- Date Issued
- 2008-05
- Publisher
- IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
- Abstract
- This study describes the dependence of the surface electric field to the junction depth of source/drain-extension, and the suppression of gate induced drain leakage (GIDL) in fully depleted shallow junction gate-overlapped source/drain-extension (SIDE). The GIDL can be reduced by reducing shallow junction depth of drain-extension. Total space charges are a function of junction depth in fully depleted shallow junction drain-extension, and the surface potential is proportional to these charges. Because the GIDL is proportional to surface potential, GIDL is the function of junction depth in fully depleted shallow junction drain-extension. Therefore, the GIDL is suppressed in a fully depleted shallow junction drain-extension by reducing surface potential. Negative substrate bias and halo doping could suppress the GIDL, too. The GIDL characteristic under negative substrate bias is contrary to other GIDL models.
- URI
- https://oasis.postech.ac.kr/handle/2014.oak/10295
- DOI
- 10.1093/IETELE/E91-C.5.761
- ISSN
- 0916-8524
- Article Type
- Article
- Citation
- IEICE TRANSACTIONS ON ELECTRONICS, vol. E91-C, no. 5, page. 761 - 766, 2008-05
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