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A 2.5Gbps Transceiver and Channel Architecture for High-Speed Automotive Communication System SCIE SCOPUS

Title
A 2.5Gbps Transceiver and Channel Architecture for High-Speed Automotive Communication System
Authors
Lee, KyongsuSim, Jae-Yoon
Date Issued
2019-10
Publisher
IEICE-INST ELECTRONICS INFORMATION COMMUNICATIONS ENG
Abstract
In this paper, a new transceiver system for the in-vehicle communication system is proposed to enhance data transmission rate and timing accuracy in TDM-based application. The proposed system utilizes point-to-point (P2P) channel, a closed-loop clock forwarding path, and a transceiver with a repeater and clock delay adjuster. The proposed system with 4 ECU (Electronic Computing Unit) nodes is implemented in 180nm CMOS technology and, when compared with conventional bus-based system, achieved more than 125 times faster data transmission. The maximum data rate was 2.5Gbps at 1.8V power supply and the worst peak-to-peak jitter for the data and clock signals over 5000 data symbols were about 49.6ps and 9.8ps respectively.
URI
https://oasis.postech.ac.kr/handle/2014.oak/100215
DOI
10.1587/transele.2018ECS6023
ISSN
1745-1353
Article Type
Article
Citation
IEICE TRANSACTIONS ON ELECTRONICS, vol. E102C, no. 10, page. 766 - 769, 2019-10
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