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dc.contributor.author박홍준-
dc.date.accessioned2018-06-21T05:20:21Z-
dc.date.available2018-06-21T05:20:21Z-
dc.date.created2009-03-27-
dc.date.issued2004-10-01-
dc.identifier.urihttps://oasis.postech.ac.kr/handle/2014.oak/74958-
dc.publisherIT-SoC-
dc.relation.isPartOfInternational SoC Design Conference-
dc.relation.isPartOfInternational SoC Design Conference-
dc.titleA 4-Gb/s Single-Ended Transmitter for DRAM Interface with Pre-Emphasis and Low Skew Multiplexing using a 0.25um CMOS Process-
dc.typeConference-
dc.type.rimsCONF-
dc.identifier.bibliographicCitationInternational SoC Design Conference, pp.514 - 517-
dc.citation.conferenceDate2004-10-25-
dc.citation.endPage517-
dc.citation.startPage514-
dc.citation.titleInternational SoC Design Conference-
dc.contributor.affiliatedAuthor박홍준-
dc.description.journalClass1-
dc.description.journalClass1-

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박홍준PARK, HONG JUNE
Dept of Electrical Enginrg
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