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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 정윤하 | - |
| dc.date.accessioned | 2018-06-18T05:46:20Z | - |
| dc.date.available | 2018-06-18T05:46:20Z | - |
| dc.date.created | 2013-02-04 | - |
| dc.date.issued | 2012-09-05 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/62342 | - |
| dc.publisher | IEEE | - |
| dc.relation.isPartOf | The International Conference on Simulation of Semiconductor Processes and Devices | - |
| dc.title | Modeling and Analysis of the Parasitic Series Resistance in Raised Source/Drain FinFETs with Polygonal Epitaxy | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | The International Conference on Simulation of Semiconductor Processes and Devices | - |
| dc.citation.conferencePlace | US | - |
| dc.citation.title | The International Conference on Simulation of Semiconductor Processes and Devices | - |
| dc.contributor.affiliatedAuthor | 정윤하 | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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Related Researcher
- 정윤하JEONG, YOON HA
- Dept of Electrical Enginrg