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Department of Electrical Engineering (전자전기공학과)
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Item hits:
Article
Improving Write Performance by Controlling Target Resistance Distributions in MLC PRAM
SCIE
SCOPUS
ACM Transactions on Design Automation of Electronic Systems, vol. 21, no. 2, 2016-01
Kim, Y
;
Yoo, S
;
Lee, S
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ARCHITECTURE
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Design
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DRIFT
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multi-level cell
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Performance
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Phase change RAM
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PHASE-CHANGE MEMORY
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resistance distribution
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write performance
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