DC Field | Value | Language |
---|---|---|
dc.contributor.author | Wook Kim | - |
dc.contributor.author | Hyoun Soo PARK | - |
dc.contributor.author | Kim, YH | - |
dc.date.accessioned | 2016-04-01T08:22:11Z | - |
dc.date.available | 2016-04-01T08:22:11Z | - |
dc.date.created | 2010-07-20 | - |
dc.date.issued | 2009-07-30 | - |
dc.identifier.issn | 0013-5194 | - |
dc.identifier.other | 2009-OAK-0000019331 | - |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/27818 | - |
dc.description.abstract | A simple but effective technique for timing yield enhancement is presented. The proposed technique tunes circuit timing using dual-mode elements, which are special logic gates that can change delay leakage characteristics at the post-silicon level. In experiments using the ISCAS-85 benchmarks, the proposed technique reduced the timing failure rate by 59.52% on average. | - |
dc.description.statementofresponsibility | X | - |
dc.language | English | - |
dc.publisher | INST ENGINEERING TECHNOLOGY-IET | - |
dc.relation.isPartOf | ELECTRONICS LETTERS | - |
dc.title | Post-silicon timing yield enhancement using dual-mode elements | - |
dc.type | Article | - |
dc.contributor.college | 전자전기공학과 | - |
dc.identifier.doi | 10.1049/EL.2009.1200 | - |
dc.author.google | Kim, W | - |
dc.author.google | Park, HS | - |
dc.author.google | Kim, YH | - |
dc.relation.volume | 45 | - |
dc.relation.issue | 16 | - |
dc.relation.startpage | 827 | - |
dc.relation.lastpage | 828 | - |
dc.contributor.id | 10176127 | - |
dc.relation.journal | ELECTRONICS LETTERS | - |
dc.relation.index | SCI급, SCOPUS 등재논문 | - |
dc.relation.sci | SCI | - |
dc.collections.name | Journal Papers | - |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | ELECTRONICS LETTERS, v.45, no.16, pp.827 - 828 | - |
dc.identifier.wosid | 000268400100014 | - |
dc.date.tcdate | 2018-03-23 | - |
dc.citation.endPage | 828 | - |
dc.citation.number | 16 | - |
dc.citation.startPage | 827 | - |
dc.citation.title | ELECTRONICS LETTERS | - |
dc.citation.volume | 45 | - |
dc.contributor.affiliatedAuthor | Kim, YH | - |
dc.identifier.scopusid | 2-s2.0-68549083693 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.scptc | 0 | * |
dc.date.scptcdate | 2018-05-121 | * |
dc.type.docType | Article | - |
dc.relation.journalWebOfScienceCategory | Engineering, Electrical & Electronic | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Engineering | - |
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