DC Field | Value | Language |
---|---|---|
dc.contributor.author | Xu, WT | - |
dc.contributor.author | Rhee, SW | - |
dc.date.accessioned | 2015-06-25T02:26:06Z | - |
dc.date.available | 2015-06-25T02:26:06Z | - |
dc.date.created | 2011-03-28 | - |
dc.date.issued | 2011-01 | - |
dc.identifier.issn | 0959-9428 | - |
dc.identifier.other | 2015-OAK-0000023121 | en_US |
dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/10953 | - |
dc.description.abstract | The effects of electrical leakage and capacitance density were investigated in the low-voltage operated organic field-effect transistors (OFETs) by using a gate dielectric with a bi-layer structure of atomic layer deposited alumina (ALD-Al2O3) and high-k polymeric cyanoethylated pullulan (CEP) layer. A significant improvement in the device performance was achieved by compromising the two effects, suppressing the leakage current with ALD-Al2O3 dielectric and maintaining the high capacitance with high-k polymeric layer. With the optimized thickness of similar to 5 nm alumina (C-i,C-CEP/Al2O3 similar to 85 nF cm(-2)), a high mobility of similar to 5 cm(2) V-1 s(-1) and sharp subthreshold slope (SS) of 0.066 V dec(-1) were obtained. The smoother surface of the polymeric dielectric surface enhanced the 2-dimensional vertical molecular layer growth and contributed to the better device performance. | - |
dc.description.statementofresponsibility | open | en_US |
dc.language | English | - |
dc.publisher | ROYAL SOC CHEMISTRY | - |
dc.relation.isPartOf | JOURNAL OF MATERIALS CHEMISTRY | - |
dc.rights | BY_NC_ND | en_US |
dc.rights.uri | http://creativecommons.org/licenses/by-nc-nd/2.0/kr | en_US |
dc.title | Compromise of electrical leakage and capacitance density effects: a facile route for high mobility and sharp subthreshold slope in low-voltage operable organic field-effect transistors | - |
dc.type | Article | - |
dc.contributor.college | 화학공학과 | en_US |
dc.identifier.doi | 10.1039/C0JM02401E | - |
dc.author.google | Xu, WT | en_US |
dc.author.google | Rhee, SW | en_US |
dc.relation.volume | 21 | en_US |
dc.relation.issue | 4 | en_US |
dc.relation.startpage | 998 | en_US |
dc.relation.lastpage | 1004 | en_US |
dc.contributor.id | 10052631 | en_US |
dc.relation.journal | JOURNAL OF MATERIALS CHEMISTRY | en_US |
dc.relation.index | SCI급, SCOPUS 등재논문 | en_US |
dc.relation.sci | SCI | en_US |
dc.collections.name | Journal Papers | en_US |
dc.type.rims | ART | - |
dc.identifier.bibliographicCitation | JOURNAL OF MATERIALS CHEMISTRY, v.21, no.4, pp.998 - 1004 | - |
dc.identifier.wosid | 000286110400011 | - |
dc.date.tcdate | 2019-01-01 | - |
dc.citation.endPage | 1004 | - |
dc.citation.number | 4 | - |
dc.citation.startPage | 998 | - |
dc.citation.title | JOURNAL OF MATERIALS CHEMISTRY | - |
dc.citation.volume | 21 | - |
dc.contributor.affiliatedAuthor | Rhee, SW | - |
dc.identifier.scopusid | 2-s2.0-78651381162 | - |
dc.description.journalClass | 1 | - |
dc.description.journalClass | 1 | - |
dc.description.wostc | 16 | - |
dc.description.scptc | 17 | * |
dc.date.scptcdate | 2018-10-274 | * |
dc.type.docType | Article | - |
dc.subject.keywordPlus | THIN-FILM TRANSISTORS | - |
dc.subject.keywordPlus | GATE DIELECTRICS | - |
dc.subject.keywordPlus | HYBRID DIELECTRICS | - |
dc.subject.keywordPlus | PENTACENE | - |
dc.subject.keywordPlus | PERFORMANCE | - |
dc.subject.keywordPlus | INSULATOR | - |
dc.subject.keywordPlus | ELECTRONICS | - |
dc.subject.keywordPlus | FABRICATION | - |
dc.subject.keywordPlus | SENSORS | - |
dc.subject.keywordPlus | GROWTH | - |
dc.relation.journalWebOfScienceCategory | Chemistry, Physical | - |
dc.relation.journalWebOfScienceCategory | Materials Science, Multidisciplinary | - |
dc.description.journalRegisteredClass | scie | - |
dc.description.journalRegisteredClass | scopus | - |
dc.relation.journalResearchArea | Chemistry | - |
dc.relation.journalResearchArea | Materials Science | - |
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