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Showing results 1 to 10 of 10
Conference
A Low-EMI Four-Bit Four-Wire Single-Ended DRAM Interface by Using a Three-Level Balanced Coding Scheme

2016 Symposia on VLSI Technology and Circuits, 2016-06-15

Conference
A Low-EMI Four-Bit Four-Wire Single-Ended DRAM Interface by Using A Three-Level Balanced Coding Scheme

IEEE Symposia on VLSI Technology and Circuits, 2016-06-15

Conference
A Reduced-Size Look-Up-Table for ADC Sample-Times of a Single-Chip Non-Uniform-Sampling Digital-Beamformer for Ultasound Medical Imaging

ISOCC(International SoC Design Conference), 2015-11-02

Conference
A Reduced-Size Look-Up-Table for ADC Sample-Times of a Single-Chip Non-Uniform-Sampling Digital-Beamformer for Ultasound Medical Imaging

ISOCC2015, 2015-11-04

Conference
A reduced-size look-up-table for ADC sample-times of a single-chip non-uniform-sampling digital-beamformer for ultrasound medical imaging

IEEE International SoC Design Conference, 2015-11-02

Conference
A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS

IEEE International Solid-State Circuits Conference, 2017-02-05

Conference
An Analog-Digital-Hybrid Single-Chip RX Beamformer with Non-Uniform Sampling for 2D-cMUT Ultrasound Imaging to Achieve Wide Dynamic Range of Delay and Small Chip Area

IEEE, International Solid-State Circuits Conference, 2014-02-14

Conference
An analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area

International Solid-State Circuits Conference, page. 426 - 427, 2014-02-12

Conference
An Analog-Digital-Hybrid Single-Chip RX Beamformer with Non-Uniform Sampling for 2D-CMUT Ultrasound Imaging to Achieve Wide Dynamic Range of Delay and Small Chip Area

IEEE International Solid-State Circuits Conference, page. 426 - 427, 2014-02-11

Thesis
Low-Power High-Speed DRAM Interface with Duo-Binary Transmitter and Time- Based Receiver Circuits

Thesis(Doctor), 2021

1
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