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BAEK, ROCK HYUN(백록현) scopus

Department: Dept of Electrical Engineering(전자전기공학과)

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Publication & Time Cited Count (For the Last 5 years)

Results 1-20 of 24 (Search time: 0.002 seconds).

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Date Issued : [2010 TO 2019]

Article

Electron trapping and extraction kinetics on carrier diffusion in metal halide perovskite thin filmsSCIESCOPUS

Journal of Materials Chemistry A, vol. 7, no. 45, page. 25838 - 25844, 2019-12

Article

Source/Drain Patterning FinFETs as Solution for Physical Area Scaling Toward 5-nm NodeSCIESCOPUS

IEEE ACCESS, vol. 7, page. 172290 - 172295, 2019-12

Article

Bottom oxide Bulk FinFETs Without Punch-Through-Stopper for Extending Toward 5-nm NodeSCIESCOPUS

IEEE ACCESS, vol. 7, page. 75762 - 75767, 2019-06

Article

Impact of geometrical parameters on the electrical performance of network-channel polycrystalline silicon thin-film transistorsSCIESCOPUS

JAPANESE JOURNAL OF APPLIED PHYSICS, vol. 57, no. 10, 2018-10

Article

Analog Figure-of-Merits Comparison of Gate Workfunction Variability and Random Discrete Dopant Between Inversion-Mode and Junctionless Nanowire FETsSCIE

JOURNAL OF NANOSCIENCE AND NANOTECHNOLOGY, vol. 18, no. 9, page. 6598 - 6601, 2018-09

Article

Systematic DC/AC Performance Benchmarking of Sub-7-nm Node FinFETs and Nanosheet FETsSCIESCOPUS

IEEE Journal of the Electron Devices Society, vol. 6, no. 1, page. 942 - 947, 2018-08

Article

Threshold voltage variation depending on single grain boundary and stored charges in an adjacent cell for vertical silicon-oxide-nitride-oxide-silicon (SONOS) NAND flash memorySCIESCOPUS

JAPANESE JOURNAL OF APPLIED PHYSICS, vol. 57, no. 4S, 2018-04

Article

Systematic analysis of oxide trap distribution of 4H-SiC DMOSFETs using TSCIS and its correlation with BTI and SILC behaviorSCIESCOPUS

SOLID-STATE ELECTRONICS, vol. 140, page. 18 - 22, 2018-02

Article

Work function consideration in vacuum field emission transistor designSCIESCOPUS

JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, vol. 35, no. 6, 2017-11

Article

Process-Induced Variations of 10-nm Node Bulk nFinFETs Considering Middle-of-Line ParasiticsSCIESCOPUS

IEEE Transactions on Electron Devices, vol. 63, no. 9, page. 3399 - 3405, 2016-09

Article

High-Performance Logic Transistor DC Benchmarking Toward 7 nm Technology-Node Between III-V and Si Tri-gate n-MOSFETs Using Virtual-Source Injection Velocity ModelSCIESCOPUS

SOLID-STATE ELECTRONICS, vol. 116, page. 100 - 103, 2016-02

Article

Investigation of RC Parasitics Considering Middle-of-the-Line in Si-Bulk FinFETs for Sub-14-nm Node Logic ApplicationsSCIESCOPUS

IEEE TRANSACTIONS ON ELECTRON DEVICES, vol. 62, no. 10, page. 3441 - 3444, 2015-10

Article

Junction Design Strategy for Si Bulk FinFETs for System-on-Chip Applications Down to the 7-nm NodeSCIESCOPUS

IEEE ELECTRON DEVICE LETTERS, vol. 36, no. 10, page. 994 - 996, 2015-10

Article

Impact of Spacer Dielectric Constant on Parasitic RC and Design Guidelines to Optimize DC/AC Performance in 10 nm Node Si-Nanowire FETsSCIESCOPUS

JAPANESE JOURNAL OF APPLIED PHYSICS, vol. 54, no. 4, page. 4DN08-1 - 4DN08-5, 2015-04

Article

Physical DC and Thermal Noise Models of 18 nm Double-Gate Junctionless pMOSFETs for Low Noise RF ApplicationsSCIESCOPUS

JAPANESE JOURNAL OF APPLIED PHYSICS, vol. 54, no. 4, page. 4DC08-1 - 4DC08-6, 2015-04

Article

Investigation of Process-Induced Performance Variability and Optimization of the 10 nm Technology Node Si Bulk FinFETsSCIESCOPUS

SOLID-STATE ELECTRONICS, vol. 96, page. 27 - 33, 2014-06

Article

STLM: A Sidewall TLM Structure for Accurate Extraction of Ultralow Specific Contact ResistivitySCIESCOPUS

IEEE ELECTRON DEVICE LETTERS, vol. 34, no. 9, page. 1082 - 1084, 2013-09

Article

Device Design Guidelines for Nanoscale FinFETs in RF/Analog ApplicationsSCIESCOPUS

IEEE ELECTRON DEVICE LETTERS, vol. 33, no. 9, page. 1234 - 1236, 2012-09

Article

Electrical characteristics of 20-nm junctionless Si nanowire transistorsSCIESCOPUS

Solid State Electronics, vol. 73, page. 7 - 10, 2012-07

Article

A comparative study of depth profiling of interface states using charge pumping and low frequency noise measurement in SiO2/HfO2 Gate Stack nMOSFETsSCIESCOPUS

MICROELECTRONIC ENGINEERING, vol. 88, no. 12, page. 3411 - 3414, 2011-12

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