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A sub-micron FET V gate process for high performance field effect transistor

Title
A sub-micron FET V gate process for high performance field effect transistor
Authors
김오현
Date Issued
1990-01-01
Publisher
IEEE
URI
https://oasis.postech.ac.kr/handle/2014.oak/90392
Article Type
Conference
Citation
IEEE 1990 workshop on micrometer and sub-micrometer lithography, New Orleans, LA, 1990-01-01
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김오현KIM, OHYUN
Dept of Electrical Enginrg
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