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A 4-Gb/s Single-Ended Transmitter for DRAM Interface with Pre-Emphasis and Low Skew Multiplexing using a 0.25um CMOS Process

Title
A 4-Gb/s Single-Ended Transmitter for DRAM Interface with Pre-Emphasis and Low Skew Multiplexing using a 0.25um CMOS Process
Authors
박홍준
POSTECH Authors
박홍준
Date Issued
1-Oct-2004
Publisher
IT-SoC
URI
http://oasis.postech.ac.kr/handle/2014.oak/74958
Article Type
Conference
Citation
International SoC Design Conference, page. 514 - 517, 2004-10-01
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박홍준PARK, HONG JUNE
Dept of Electrical Enginrg
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