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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 심재윤 | - |
| dc.contributor.author | 성기환 | - |
| dc.contributor.author | 이원철 | - |
| dc.contributor.author | 김병섭 | - |
| dc.contributor.author | 박홍준 | - |
| dc.date.accessioned | 2018-06-19T03:14:09Z | - |
| dc.date.available | 2018-06-19T03:14:09Z | - |
| dc.date.created | 2016-02-23 | - |
| dc.date.issued | 2016-01-25 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/70826 | - |
| dc.publisher | IEEE | - |
| dc.relation.isPartOf | ICEIC 2016 : 18th International Conference on Electronics, Information and Communication | - |
| dc.relation.isPartOf | ICEIC 2016 | - |
| dc.title | All-synthesizable 5-phase Phase-Locked Loop | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | ICEIC 2016 : 18th International Conference on Electronics, Information and Communication | - |
| dc.citation.title | ICEIC 2016 : 18th International Conference on Electronics, Information and Communication | - |
| dc.contributor.affiliatedAuthor | 심재윤 | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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Related Researcher
- 심재윤SIM, JAE YOON
- Dept of Electrical Enginrg