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| DC Field | Value | Language |
|---|---|---|
| dc.contributor.author | 유승주 | - |
| dc.date.accessioned | 2018-06-18T03:02:53Z | - |
| dc.date.available | 2018-06-18T03:02:53Z | - |
| dc.date.created | 2012-03-19 | - |
| dc.date.issued | 2011-08-09 | - |
| dc.identifier.uri | https://oasis.postech.ac.kr/handle/2014.oak/59934 | - |
| dc.publisher | IEEE | - |
| dc.relation.isPartOf | International Midwest Symposium on Circuits and Systems (MWSCAS) | - |
| dc.relation.isPartOf | INTERNATIONAL MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS (MWSCAS) | - |
| dc.title | Integration of Cache Data Allocation and Voltage/Frequency Scaling for Temperature Constrained Multi-core Systems with 3-D Stacked Cache Memory | - |
| dc.type | Conference | - |
| dc.type.rims | CONF | - |
| dc.identifier.bibliographicCitation | International Midwest Symposium on Circuits and Systems (MWSCAS) | - |
| dc.citation.conferencePlace | KO | - |
| dc.citation.title | International Midwest Symposium on Circuits and Systems (MWSCAS) | - |
| dc.contributor.affiliatedAuthor | 유승주 | - |
| dc.description.journalClass | 1 | - |
| dc.description.journalClass | 1 | - |
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Related Researcher
- 유승주YOO, SUNGJOO
- Dept of Electrical Enginrg