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Timing Verification for Latch-controlled VLSI Synchronous Systems
- Title
- Timing Verification for Latch-controlled VLSI Synchronous Systems
- Authors
- 김영환
- POSTECH Authors
- 김영환
- Date Issued
- 11-May-1996
- Publisher
- 대한전자공학회
- Article Type
- Conference
- Citation
- Proceedings of KITE CAD & VLSI Design Conference, page. 48 - 51, 1996-05-11
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Related Researcher
- 김영환KIM, YOUNG HWAN
- Dept of Electrical Enginrg