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Impact of High-k Spacers on Parasitic Effects Considering DC/AC Performance Optimization in Si-Nanowire FETs for sub 10 nm Technology Node
- Title
- Impact of High-k Spacers on Parasitic Effects Considering DC/AC Performance Optimization in Si-Nanowire FETs for sub 10 nm Technology Node
- Date Issued
- 2014-09-08
- Publisher
- The Japan Society of Applied Physics
- Article Type
- Conference
- Citation
- Solid State Devices and Materials (SSDM2014), 2014-09-08
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Related Researcher
- 백록현BAEK, ROCK HYUN
- Dept of Electrical Enginrg