A Low-power Low-noise Quadrature Relaxation Oscillator

Abstract

This paper presents a low power and low noise quadrature RC oscillator based on a frequency locked loop. Voltage swing control of each of the two sub-oscillators reduces the effect of 1/f noise on the accumulated jitter. In addition, the use of quadrature phases greatly relieves timing constraints of sampling operations and helps the reduction of power consumption. With a discrete-time modeling of the quadrature oscillator, noise analysis is also provided for quantitative estimation of the circuit-driven effects on the phase noise. This paper proposes a circuit architecture and design strategy of a low noise oscillator based on distributed RC network. The distributed RC network receives a differential step input and propagates the true phase through resistive path while the complementary phase through capacitive path. It effectively realizes a band-pass filtering of the step input and increases the signal transition slope by emulating a π–delayed sinusoidal waveform.