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KANG, BONG KOO (강봉구)

Dept of Electrical Engineering(전자전기공학과)

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dark discharge:6||plasma display panel:6||MODEL:6||GENERATION:5||subfield method:5||CURRENT GAIN:5||plasma display panel (PDP):5||STRESS:5||MOSFET:5||simulation:4||ENERGYTRANSFER:4||magnetic field measurement:4||COLLAPSE:4||CELL:4||helical resonator:4||MOSFETS:3||contrast ratio:3||VOLTAGE:3||heterojunction bipolar transistor:3||AC discharge:3||SILICON:3||FREQUENCY:3||PDP:3||Hall probe:3||TRANSISTORS:3||plasma source:3||RESONATOR DISCHARGE:3||cyclotron:3||altimeter:3||Townsend discharge:3||HFO2:3||OXIDE:3||Effective channel length:2||TFT:2||Shallow trench isolation (STI):2||VUV fluorescence:2||Self and Tm activated CaWO4:2||BAM:Eu2+:2||Blue POP phosphor:2||discharge:2||plasma display:2||hetrojunction bipolar transistor:2||pulsed discharge:2||PDP drive waveform:2||THERMOSTIMULATED LUMINESCENCE:2||BACKLIGHT DRIVING SYSTEM:2||LAMPS:2||backscattering:2||wall voltage:2||inductively coupled plasma:2||HBT:2||silicon oxynitride:2||address jitter:2||INTERFACE TRAPS:2||AlGaAs ledge:2||DEGRADATION:2||Mechanical stress:2||LEAKAGE CURRENT:2||DIELECTRIC STACKS:2||HFSION:2||EU2+:2||magneticfield measurement:2||gap voltage:2||thermal stability:2||power heterojunction bipolar transistor:2||BEHAVIOR:2||IONS:2||SHIFT:2||RTCVD:2||IMPACT:2||Color purity:2||Grain size:2||PHOSPHORS:2||Townsend discharged:2||Paschen breakdown curve:2||phaselocked loop:2||OXIDATION:2||thermal regression:2||FINGERS:2||steel plates:2||RESET:2||CALCIUMSULFATE:2||polycrystalline silicon germanium:2||Electron trap:2||MECHANISM:2||OFFstate stress:2||negative bias temperature instability (NBTI):2||secondary electron:2||dielectric barrier:2||DEVICES:2||OPTICALPROPERTIES:2||SPECTROSCOPY:2||address jitters:2||rotating coil:2||surface treatment:2||interface state:2||MICRODISK LASERS:2||RF heating:2||thickness sensors:2||SENSITIZATION:2||DIELECTRICS:2||OXIDES:2||ELECTRON:2||BAMGAL10O17EU2+:2||NBTI:2||voltagecontrolled oscillator:2||discharge circuit model:2||RF discharge:2||gate dielectric:2||gate oxide integrity:2||plasma processinduced damage:2||THERMOLUMINESCENCE:2||LCD PANELS:2||PLASMA DISPLAY PANEL:2||chaos:2||OSCILLATIONS:2||magnetic flux sensors:2||Positive bias temperature instability (PBTI):1||Shallow traps:1||GATE STACKS:1||RELIABILITY:1||SI:1||ZTO:1||Directcurrentdirectcurrent (dcdc) power conversion:1||DESIGN:1||Dummy active patterns:1||oxide charge:1||PMOSFETS:1||pH sensor:1||reference electrode:1||inductive coupled plasma:1||size:1||nanocrystal:1||SURFACE PASSIVATION LAYER:1||impedance model:1||negative bias temperature instability:1||oxynitride gate dielectric:1||interface state degradation:1||delayline feedback:1||plasma oxidation:1||Face discharge:1||Plategap discharge:1||DAC:1||GAAS MIS INTERFACE:1||SINGLE:1||DIFFUSION:1||AL:1||REVERSERECOVERY:1||DRIVERS:1||DISPLAY:1||Magnetic field measurement:1||Interface trap:1||Data voltage reduction:1||metaloxidesemiconductor fieldeffect transistor (MOSFET):1||BIAS:1||radio frequency (RF) heating:1||oxidation:1||LAYER:1||HYDROGEN:1||annealing:1||HOTELECTRON DEGRADATION:1||equivalent oxide thickness:1||OXIDE THICKNESS:1||FILMS:1||lange coupler:1||wideband phase shifter:1||amplifier:1||AXIS:1||insertion device:1||threshold voltage:1||1/f noise:1||gate tunneling current:1||Plasma display panel:1||Image sticking:1||Floating single sustain method:1||Drive method of plasma display panel (PDP):1||Magnet power supply:1||Magnet field measurement:1||AES ANALYSIS:1||Thermal stability:1||DIOXIDE FILMS:1||Active channel layer thickness:1||HOTCARRIER DEGRADATION:1||SENSORS:1||SIGE:1||NBOHC:1||LIGHT EMISSION:1||thermal instability:1||high density plasma science:1||reliability:1||HIGH XE CONTENT:1||plasma display panels:1||CURRENTS:1||facing discharges:1||circuit model of discharge:1||PREAMPLIFIER:1||reliability of MOSFET:1||PASSIVATION LAYER:1||HBTS:1||LCD:1||Discharge model:1||voltagecontrolled oscillator (VCO):1||Gate leakage current:1||Gate tunneling current:1||SERIES RESISTANCE:1||Interconnection method of PDP:1||Hallprobe:1||SURFACES:1||Heterojunction bipolar transistor (HBT):1||Power density:1||Dynamic random access memory (DRAM):1||Spin coating:1||STACKS:1||External electrode fluorescent lamp (EEFL):1||Backlight unit (BLU):1||MINIMIZATION:1||positive oxide charge:1||FABRICATION:1||power splitter:1||segregation:1||SiO2/SiGe interface:1||baseballast resistor:1||deuterium annealing:1||POSITIVE CHARGE:1||high Xe content gas discharge:1||solenoid:1||power efficiency:1||bias temperature instability:1||Lamp circuit model:1||High Xe:1||Analog adder:1||FIELD:1||ECR plasma hydrogenation:1||DEADTIME COMPENSATION:1||Recess channel array transistor (RCAT):1||SEMICONDUCTOR:1||CHANNEL MOSFETS:1||snubbers:1||IMPLEMENTATION:1||ISSUES:1||Local dimming:1||metal insulator capacitor:1||PLASMA PASSIVATION:1||photoluminescence:1||charge pumping:1||PLASMA SOURCE:1||sheath:1||physical oxide thickness:1||phosphor surface treatment:1||firing voltage:1||energy recovery circuit:1||maximum oscillation frequency:1||GAAS:1||hot carrier effect:1||Subfield method:1||Long gap structure:1||TEMPERATUREDEPENDENT CHARACTERISTICS:1||CMOS TFT:1||SULFUR PASSIVATION:1||PHOSPHORUSNITRIDE:1||GAAS MISEET:1||PWM INVERTERS:1||FN stress:1||NMOSFETS:1||STI:1||lightemittingdiode (LED) displays:1||HIGHVOLTAGE GAIN:1||INSTABILITY:1||ENHANCEMENT:1||Plasma display panel (PDP):1||INDUCED MOSFET DEGRADATION:1||power combiners:1||PHOTOLUMINESCENCE:1||magnetic flux sensor:1||latent damage:1||ramp reset:1||BIAS TEMPERATURE INSTABILITY:1||drive waveform for:1||hybrid coupled phase shifter:1||beam current measurement:1||circuit model of plasma:1||NITROGEN:1||ideality factor:1||EXTRACTION:1||CCFL:1||BLU:1||plasma nitridation:1||Nanoscale MOSFET:1||WAVEFORM:1||DEPOSITION:1||Highk dielectrics:1||Sn doping:1||Scan method:1||Ag/AgCl:1||thin film reference electrode:1||power dividers:1||IMPLANTATION:1||Xray photoelectron spectroscopy:1||implant:1||electromagnet:1||magnetic sensor:1||LIFETIME:1||SHEATH:1||MERIE:1||BREAKDOWN:1||gas discharge displays:1||facing dark discharge:1||IMPROVEMENT:1||radial stub:1||latent plasma processinduced damage:1||EQUIVALENTCIRCUIT:1||gatesource/drain overlap length:1||SIO2:1||Wall charge:1||PHOTOCVD:1||FILM:1||GATE DIELECTRIC STACKS:1||Base ballast resistor:1||Bypass capacitor:1||THIN SILICON:1||Refresh time:1||Solution process:1||SOLGEL METHOD:1||Subthreshold current:1||Magnet:1||Drain induced barrier lowering (DIBL):1||Energy recovery circuit:1||Liquid crystal display (LCD):1||high temperature:1||interface trap:1||DEPENDENCE:1||harmonic suppression:1||Wilkinson power combiner:1||oxide charges:1||PLASMA:1||surface passivation:1||steel plate control:1||ac stress:1||PPID:1||OXIDESEMICONDUCTOR TRANSISTORS:1||REDUCTION:1||flat panel displays:1||radial capacitor:1||sustain circuit:1||series/parallel resonance:1||LIGHTSOURCE:1||frequency modulated continuouswave (FMCW) radar:1||Plasma display panels:1||Single sustain method:1||Cyclotron:1||low temperature:1||ALLOYS:1||TEMPERATURE:1||

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