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Verilog로 설계 및 합성한 USB 2.0 High Speed용 송수신기의 디지털 회로

Title
Verilog로 설계 및 합성한 USB 2.0 High Speed용 송수신기의 디지털 회로
Authors
여동희
Date Issued
2010
Publisher
포항공과대학교
Abstract
This paper presents a receiver and a transmitter digital circuit for the USB 2.0 physical layer high speed interface. The circuit operates in 480 Mbit/sec. The receiver consists of a 1-to-8-bit de-serializer, a bit un-stuffer, and a non-return to zero inverted decoder. The transmitter includes an 8-to-1-bit serializer, a bit stuffer, and a non-return to zero inverted decoder. Squelch signal is added to a basic USB 2.0 system for a safe operation of the circuit, and other functions are fully verified USB 2.0 specification. Synthesis, and auto post and routing process are performed with 130 nm process.
URI
http://postech.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000000791867
http://oasis.postech.ac.kr/handle/2014.oak/896
Article Type
Thesis
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