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Body-Tied Rectangular Channel Triple Gate FinFET 공정조건 최적화와 Simulation 결과 Using TMAH Wet Etching(Bulk Si Wafer)

Title
Body-Tied Rectangular Channel Triple Gate FinFET 공정조건 최적화와 Simulation 결과 Using TMAH Wet Etching(Bulk Si Wafer)
Authors
박상수
Date Issued
2006
Publisher
포항공과대학교
URI
http://postech.dcollection.net/jsp/common/DcLoOrgPer.jsp?sItemId=000001907531
http://141.223.5.61//handle/2014.oak/7749
Article Type
Thesis
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