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Hybrid gate-level 누설 전류 모델의 gate library characterization에 적합한 error metric

Title
Hybrid gate-level 누설 전류 모델의 gate library characterization에 적합한 error metric
Authors
김영환권현정박해성김진욱
POSTECH Authors
김영환
Date Issued
16-May-2015
Publisher
대한전자공학회
URI
http://oasis.postech.ac.kr/handle/2014.oak/71461
Article Type
Conference
Citation
대한전자공학회 SoC 설계연구회학술발표회, 2015-05-16
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 KIM, YOUNG HWAN
Dept of Electrical Enginrg
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