Balanced Current Source Model of the Three-input Combinational Logic Gate for Timing Analysis
- Balanced Current Source Model of the Three-input Combinational Logic Gate for Timing Analysis
- 김영환; Kai Chen
- POSTECH Authors
- Date Issued
- IEEE Circuits and Systems Society
- Article Type
- 11th Conference on PhD Research in Microelectronics and Electronics (IEEE PRIME 2015), page. 121 - 124, 2015-07-01
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