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dc.contributor.author박홍준ko
dc.contributor.author성기환ko
dc.contributor.author이원철ko
dc.contributor.author김병섭ko
dc.contributor.author심재윤ko
dc.date.accessioned2018-06-19T02:55:56Z-
dc.date.available2018-06-19T02:55:56Z-
dc.date.created2016-02-18-
dc.date.issued2016-01-27-
dc.identifier.citationICEIC 2016-
dc.identifier.urihttp://oasis.postech.ac.kr/handle/2014.oak/70533-
dc.publisherIEIE, IEEE-
dc.titleAll-synthesizable 5-phase Phase-Locked Loop-
dc.typeConference-
dc.type.rimsCONF-
dc.contributor.localauthor박홍준-
dc.contributor.nonIdAuthor성기환-
dc.contributor.nonIdAuthor이원철-
dc.contributor.nonIdAuthor김병섭-
dc.contributor.nonIdAuthor심재윤-
dc.citation.titleICEIC 2016-
dc.description.journalClass1-

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 PARK, HONG JUNE
Dept of Electrical Enginrg
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