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PHOEMICS 최적화 프로그램을 이용한 coupled microstrip line의 SPICE RLGC 파라미터 추출 / Feed-forward equalizer의 계수 값 결정 방법

PHOEMICS 최적화 프로그램을 이용한 coupled microstrip line의 SPICE RLGC 파라미터 추출 / Feed-forward equalizer의 계수 값 결정 방법
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In this thesis, the SPICE RLGC parameters of coupled microstrip line were extracted by using PHOEMICS optimization program, and a decision method for the feed-forward equalizer tap-coefficients was proposed. The 2x2 RLGC matrices of 2-coupled microstrip line were extracted from various measurements. First, LCR-meter was used to extract the values of self capacitance (Cs), mutual capacitance (Cm). It was assumed in this extraction step that two lines are perfectly same. Second, TDR (Time Domain Reflectometry) was used to extract the value of self inductance (Ls). In this extraction step, the TDR source was only applied to one of two lines and other line was static. Third, PHOEMICS optimization program was used to extract the other RLGC parameters from S-parameter values measured by using 2-port VNA measurements. Each RLGC parameter was extracted from the related S-parameter and its frequency range. Comparison of the simulated S-parameter by using extracted RLGC parameters with those from 2-port VNA measurements reveals a maximum difference of 4.5 dB and 5.4 dB for S21, S41, respectively. An approach to determine the tap-coefficients of a feed-forward equalizer (FFE) without the error accumulation was proposed. The simple-minded method of taking the negative values of the pulse response as the FFE tap-coefficients generated the accumulated error terms. This error accumulation was induced because the added components for FFE compensation also experienced the intersymbol interference (ISI). For the channel with the pre-cursor components, the situation became worse and the error terms were more accumulated. Thus, an analytic method was needed to decide the FFE tap-coefficients, which guaranteed no error terms accumulated from the time points up to the data-period times the number of tap-coefficients. In this way, the accumulated error terms were significantly reduced compared to the simple-minded method. The proposed method was applied to a FR4 PCB transmission line with the length ranging from 40cm to 100cm, and with the non-zero pre-cursor components at the data rate of 5Gbps. The proposed method achieved the voltage eye-opening of 46% and 50% for the 2-tap and 4-tap FFE, respectively, with the channel length of 100cm, while the simple-minded method gave a zero voltage eye-opening.
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