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Reducing Read Latency in Phase-Change RAM-based Main Memory

Title
Reducing Read Latency in Phase-Change RAM-based Main Memory
Authors
유승주
POSTECH Authors
유승주
Date Issued
9-Aug-2011
Publisher
IEEE
URI
http://oasis.postech.ac.kr/handle/2014.oak/59933
Article Type
Conference
Citation
International Midwest Symposium on Circuits and Systems (MWSCAS), 2011-08-09
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유승주YOO, SUNGJOO
Dept of Electrical Enginrg
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