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Design of Systolic Arrays by Architectural Mappings

Title
Design of Systolic Arrays by Architectural Mappings
Authors
정홍
POSTECH Authors
정홍
Date Issued
4-Nov-1988
Publisher
대한전자공학회
URI
http://oasis.postech.ac.kr/handle/2014.oak/55199
Article Type
Conference
Citation
JTC-CSCC’88, page. 305 - 309, 1988-11-04
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 JEONG, HONG
Dept of Electrical Enginrg
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