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A Parallel FPGA Architecture of Dynamic Time Warping for Speech Recognition

Title
A Parallel FPGA Architecture of Dynamic Time Warping for Speech Recognition
Authors
정홍김용
POSTECH Authors
정홍
Date Issued
6-Jul-2004
Publisher
ITC-CSCC2004
URI
http://oasis.postech.ac.kr/handle/2014.oak/54331
Article Type
Conference
Citation
The 2004 International Technical Conference on Circuits/Systems, Computers and Communications, page. . - ., 2004-07-06
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 JEONG, HONG
Dept of Electrical Enginrg
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